I made my first arch - now i have a 27plug problem

[smartalec]

Well ive finely got the boards made, an all testing meters, then got a bread board an been testing my original design..
guess what .. it did'nt work (i dont have a pic programmer to change the code)
so i had to add inverters into the circuit. (i think some wise person mentioned that one before)
an i started measuring my rgb led(strings) arch.
looks like each channel draws just under 30ma with 4 channels on.

so i had to redesign the board. (bigger task than first thought)
now im looking to see how much i'll get quoted for one of the pcb suppliers mentioned by another user.

ps i know there's no caps on the ic's.. (will that realy matter since the 5v rail is coming from the renard64 boards?)

[David_AVD]

Yes, you should add 100n decoupling capacitors to the 4049 chips.

[smartalec]

Originally Posted by David_AVD

Yes, you should add 100n decoupling capacitors to the 4049 chips.

question.. whats the whole idea of cap's on every ic? i allways thought caps were either to store power or to filter the supply..

since i have a computer power supply running the ren64's, i thought the power would be smooth enouth..

or do i need to learn more..

[Matt_Edwards]

Originally Posted by smartalec

question.. whats the whole idea of cap's on every ic? i allways thought caps were either to store power or to filter the supply..

since i have a computer power supply running the ren64's, i thought the power would be smooth enouth..

or do i need to learn more..

Well yes. So you took the PS from a Computer. Even a simple observation of the motherboard and its associated plugin cards will testify the use of Power Supply decouple caps is important.
Your understanding is correct about energy storage and filtering.

The inverters outputs are basically turning on and off as fast as they can and this creates switching noise on the +5v rails. Too much noise is not good. EE designers is taught to put a cap per chip, unless they want to do a PHD on why they shouldn't. it is good practice to do so, and omitting some wont affect the performance of the board in normal operation, but when you vary the power supply between acceptable limits, and cycle the ambient temp for normal operation, you discover a PHD may not be as much fun. In some cases 100nf is not sufficient, you may need a combination of 1nF, 10nF and or a small tant.

[smartalec]

so do the caps have to be next to the IC's? could'nt i use just one big cap to do all the chips.
i understand about electrical noice, but i thought transistors did that, never thought ic's would have the same problem..
Question.. why dont they build caps into the IC's supply?
an whats better to stop the noise, electric caps, or the ceramic ones.
PHD=turning brain on over 5% to learn, nar i'll pass..lol
why get a PHD when the smart people on diyc have allready done it.
i goto adult school, but they teach basic's, stuff i allready know,
reason for me going to school, goverment funded my blinky flashie addiction..(they pay me to go, so blinky flashie gets the money)
even some of the teachers love to see my electronic progress.
(they probably wish they had the time)

Originally Posted by Matt_Edwards

Well yes. So you took the PS from a Computer. Even a simple observation of the motherboard and its associated plugin cards will testify the use of Power Supply decouple caps is important.
Your understanding is correct about energy storage and filtering.

The inverters outputs are basically turning on and off as fast as they can and this creates switching noise on the +5v rails. Too much noise is not good. EE designers is taught to put a cap per chip, unless they want to do a PHD on why they shouldn't. it is good practice to do so, and omitting some wont affect the performance of the board in normal operation, but when you vary the power supply between acceptable limits, and cycle the ambient temp for normal operation, you discover a PHD may not be as much fun. In some cases 100nf is not sufficient, you may need a combination of 1nF, 10nF and or a small tant.

[budude]

Try going through this - read the section about Transient Load Decoupling - it explains things fairly well. A bit of Googling can explain it for you also.

[Matt_Edwards]

Originally Posted by smartalec

so do the caps have to be next to the IC's?

as close as possible

could'nt i use just one big cap to do all the chips.

No big caps have a high internal impedance and loose their effectiveness at high frequencies or fast transients

i understand about electrical noice, but i thought transistors did that, never thought ic's would have the same problem..

All IC outputs are basically simple transistors configure is a couple of ways, so you already have an understanding

Question.. why dont they build caps into the IC's supply?

I can think of two reasons, the IC manufactures don't know how there are going to be used including the load on the output. And trying to add an internal Cap will make the device considerable dearer.
But a while back when IC sockets were the rage, you could buy sockets with Caps built in, I could never afford them.

an whats better to stop the noise, electric caps, or the ceramic ones.

Multilayer monolithics ceramics, like these or these.

[smartalec]

no i know why all my other prototypes never worked.

so a 4049 is sorta of a bugger of an ic with pin 1 power an 8 as gnd then.
(all i had laying around)