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Thread: PCB design best practices & critique (RFC)

  1. #1
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    Default PCB design best practices & critique (RFC)

    I'm about to submit my board for fab, and would appreciate input on how to make it better. I have one 50MHz clock, several 5MHz clocks, and many 2.5MHz signals. I've gone to SMD components (even 0603 size - I hope it's as easy as I'm told) other than RJ45 jacks.

    1) I have tried to maximize signal integrity by maximizing ground plane by filling (copper pour) both sides aggressively. Is there any downside to this?
    2) In some cases I dropped an "orphan" via in an area that wasn't filled (on one side), added it to the GND net (the other side is GND) and the pour then covers both board sides, including the empty "island". Is there any reason not to do this?
    3) I noticed that on terminals on the GND net, after copper pour I see thermal relief as expected, but the traces I had to connect the terminals to the GND added more copper. I realize that (in KiCad - but this didn't seem to work with DesignSparkPCB) I don't have connect all the GND nets together if the copper pour covers the terminal. I've removed all the GND traces from my design where this was the case. I can then add copper fill and run DRC to make sure there are no unconnected GND terminals. Is there any downside to this? (Is this what is normal and/or accepted best practice, I just didn't figure it out initially - or a bad idea?)

    I'd like to post the board layout for others to review. What's the best way to do this? Individual Gerber files for each layer give full detail without one layer obscuring the other, but it's harder to see how the whole board connects. With copper pour or without? Would the silk/mask layers also help?

    Thanks.

    Edit: Added PDFs since Gerber (*.gbr) files would not upload. Separate Front & Back Copper (w/pour) and all layers w/out pour.
    Edit: I should add that design grid is 0.025", signal traces are 6/6 and power is 32/6. Default (signal) vias are 10mil drill and 5 mil annular ring, power vias are 16mil drill and 8mil annular ring. All SMD on bottom, and 2 SMD LEDs on top (for obvious reasons) as well as THT RJ45 jacks and 0.1" headers.
    Attached Files Attached Files
    Last edited by ags0000; 03-08-2018 at 10:20 PM.

  2. #2
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    Default Re: PCB design best practices & critique (RFC)

    I don't have a lot of help for you (sorry), but I wanted to comment on the 0603 parts. I don't solder daily, but I will touch up or build small boards. If I am making requirements and I know that I might have to swap some things, 0603 is as small as I want to go. I wouldn't want to do a ton of them on a board, but a handful would be fine. I am not sure if you are planning to populate these yourself, or if the end-user will, but I do not think that 0603 is for the faint of heart. At a minimum, I would make sure you have plenty of spares. As the Old Man in A Christmas Story said, "be careful, they run all over"
    ~Jason
    [URL]http://www.tooz.us[/URL]

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  4. #3
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    Default Re: PCB design best practices & critique (RFC)

    @toozie21 I have exactly 10 caps, 2 diodes and 2 resistors sized 0603. Also other SSOP/SOIC packages and the pitch is pretty tight, but at least I can find them if they fall on the floor. I'm tempted to get a stencil made, but I'll still be hand soldering, and this is the first prototype, which may have errors before I even get to soldering.

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    Default Re: PCB design best practices & critique (RFC)

    Personally I would not bother with a stencil. 0603 are not bad, but then again I do 0402 in the lab as well. Just get a good magnifier. My process is to drop a bit of solder to one pad, tack the parts down, and then go back and do the other pad. Get some fine solder wick, for the TQFP and SOIC parts, makes it easier to get rid of the solder bridges. You will also want to clean the board after, depending on the solder used. I prefer organic so I can wash them in hot water, and dry in the oven.

    For review of the board, gerbers work for me. I use gerbview to review everything. I ALWAYS review the gerbers before sending the board out to make sure the solder mask looks OK and the silk screen isn't doing anything unexpected.

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  7. #5
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    Default Re: PCB design best practices & critique (RFC)

    Tried to upload Gerber files but no luck. Uploaded PDF files instead, but now it looks like they only download, don't display in the post...
    Last edited by ags0000; 03-08-2018 at 08:05 PM.

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    Default Re: PCB design best practices & critique (RFC)

    Can you post the .kicad_pcb file?
    /mike

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    Default Re: PCB design best practices & critique (RFC)

    Added .kicad_pcb (renamed to .kicad.pcb to allow upload) and an all-layer .pdf)

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    Default Re: PCB design best practices & critique (RFC)

    My point was only that if this board is being designed so that the final version is to be built by an end-user, it might be daunting for someone getting started or has a modicum of soldering skills. If you are going to do all the soldering, or have it eventually farmed out, my concerns are moot.
    ~Jason
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  12. #9
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    Default Re: PCB design best practices & critique (RFC)

    @toozie21 I understand your point - but I've never done 0603 before so it be beyond *my* skills as well. Only one way to find out though... :-)

  13. #10
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    Default Re: PCB design best practices & critique (RFC)

    Quote Originally Posted by ags0000 View Post
    @toozie21 I understand your point - but I've never done 0603 before so it be beyond *my* skills as well. Only one way to find out though... :-)
    No worries. Just take your time, use a nice thin solder tip, and follow Ultimgr's advice about doing one pad and then the next, you will be golden.
    ~Jason
    [URL]http://www.tooz.us[/URL]

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